Table of Contents
A multiplexer can route the correct channel and still corrupt a measurement. Leakage shifts a high-impedance source, switching injects charge, and an unsettled node reaches the ADC before it represents the new input.
Select the switch as part of the analog path. Its resistance is only one contributor; the source, load, timing, and power states determine which specifications matter.
The signal-path constraints
Record the minimum and maximum analog voltage, source impedance, load, bandwidth, supply rails, and logic-control levels. Include startup and fault states if the signal can remain present while the switch loses power.
TI’s signal-switch selection guide, reviewed September 15, 2026, describes parameters including on-resistance, leakage, capacitance, and charge injection. Use the exact device’s guaranteed limits and test conditions when turning those definitions into a specification.
A device supplied from 3.3 V does not necessarily pass every bipolar or higher-voltage sensor signal. Check the analog range independently of the control-pin thresholds. Likewise, a digital I2C switching problem may require a different architecture from a precision analog multiplexer; the I2C level-shifter guide addresses that separate task.
Leakage, switching error, and settling
As a first approximation:
Leakage-induced error = leakage current × source resistance.
For an illustrative 10 nA leakage current and 100 kΩ source resistance, the resulting error is 1 mV. Compare that result with the measurement budget before spending effort optimizing a few ohms of switch resistance.
This estimate must be expanded for the real circuit. Include leakage at the applicable temperature, selected and unselected channels, protection devices, PCB contamination, and ADC inputs. Current can flow through more than one path.
For low-impedance loads, on-resistance and its variation with signal level may be more significant. For high-impedance sensors, leakage and settling often deserve the first review. The decision follows the circuit rather than a universal ranking of switch specifications.
The transient after channel selection
Charge injection can disturb a sampled node. A simplified capacitor relation is:
Voltage step = injected charge / effective node capacitance.
An assumed 2 pC injected into 100 pF corresponds to 20 mV. That is an illustrative calculation, not a device specification. The actual transient depends on topology, signal level, impedance, and how charge divides through the network.
Adding capacitance can reduce the initial step while slowing the response. For a simple first-order network, settling from a full-scale step to half an LSB at 16 bits takes approximately 11.8 time constants. A real acquisition chain may have several poles, charge redistribution, or amplifier limitations, so this is a screening estimate.
Specify the delay from channel selection to conversion, the preceding channel’s voltage, and the required residual error. Test the largest relevant channel-to-channel step, not only adjacent channels at similar voltages.
Signals present during power loss
TI’s powered-off protection brief explains that explicit protection and leakage behavior at zero supply should be checked in the datasheet. Ordinary off-state isolation while powered does not establish the same behavior when supply is absent.
| Condition | Required question |
|---|---|
| Switch powered, channel disabled | What leakage and isolation apply? |
| Switch supply absent, input present | Is the input permitted, and can it back-power the rail? |
| Controller resetting | What logic state selects or disables channels? |
| Channels changing | Is overlap allowed, and how long must settling take? |
| Input outside the intended range | What protection and current limits apply? |
Check whether a powered-down peripheral can be energized through the signal path. Resolve this in the circuit or device selection rather than relying on firmware that cannot execute during power loss.
Qualify the actual channel sequence
For industrial data acquisition, preserve the source impedances, filters, buffer, multiplexer, ADC, and conversion schedule as one approved configuration. The voltage-reference budget addresses another error source that should remain separate.
An acceptance test should cover channel extremes, worst relevant switching sequence, temperature, power transitions, and the conversion rate. Record the residual error at the sampling instant.
Only then compare purchasing alternatives against the approved limits. Same channel count, package, and nominal resistance are insufficient when a replacement changes the transient or power-off behavior.
Frequently Asked Questions (FAQ)
Is the lowest on-resistance always the best choice?
No. Leakage, capacitance, charge injection, signal range, and settling can dominate the application. Compare the complete switched node and its source impedance.
Does break-before-make guarantee an accurate ADC result?
No. It can prevent simultaneous channel connection, but the selected node still needs time to settle within the ADC's required error limit.
How is powered-off protection verified?
Check the device's explicit signal-pin limits and leakage specifications when its supply is zero. Do not infer this protection from a high-impedance state specified only during powered operation.
